Improved Scheme for Estimating the Embedded Gate Resistance to Reproduce SiC MOSFET Circuit Performance
[摘要] The intrinsic gate resistance (R-g_in), which is a novel resistance factor embedded in transistors, was determined for silicon carbide (SiC) metal-oxidesemiconductor field-effect transistors (MOSFETs). The study demonstrated that R-g_ in is overestimated in the conventional measurement scheme due to the contact resistance Rsp between p-type SiC and the source electrode. Here, 6.7 m Omega center dot cm(2) was measured for Rsp using the transfer length method (TLM), and R-g_ in = 9 Omega was the revised value, unlike the conventional value of 25 Omega. This improved R-g_ in provides better-simulated switching waveforms in a double-pulse test (DPT) with a SiC MOSFET; however, the method requires detailed knowledge of the target device. Accordingly, we developed another measurement scheme without such prerequisites. In this scheme, three types of impedance (Z) were measured: Z between the drain (D) and source terminal (S), and two Z(s) between the gate and S, with DS left open and short. From these results, R-g_ in was determined to be 8.8 Omega with other device parasitic parameters simultaneously.
[发布日期] [发布机构]
[效力级别] Early Access [学科分类]
[关键词] HIGH-VOLTAGE [时效性]