A fully integrated 5pF output capacitor, MOS-only reference, 55-nm LDO with optimized area and power for SoC applications

[摘要] A fully integrated output capacitor, MOS-only reference, 55mnm low-dropout regulator (LDO) with optimized area and power is proposed in this letter for system-on-chip (SoC) in self-powered Internet of Things (IoT) applications. The small fully integrated output capacitor saves both area and cost, but brings challenges to the system’s stability and transient response. In order to improve system stability with optimized area, a dynamic attenuation buffer along with nested miller compensation are proposed to ensure sufficient phase margin over load range. To improve transient response with optimized power, a branch-based slew-rate enhancement (BBSRE) circuit is applied without additional quiescent current. Also, a multi-threshold MOS-only voltage reference is implemented to achieve sub-1V output and nanopower consumption with small area. The proposed LDO is fabricated in 55 nm CMOS process with the fully integrated capacitor of 5pF, occupying an area of 264µm×300µm. The quiescent current is 2µA with the figure-of-merit (FOM) of 2.

[学科分类] 电子、光学、磁材料

[关键词] fully integrated LDO;optimized area and power;dynamic attenuation buffer;branch-based slew-rate enhancement circuit;multi-threshold MOS-only reference