A Mixed Signal Architecture for Convolutional Neural Networks

[摘要] Deep neural network (DNN) accelerators with improved energy and delay are desirable for meeting the requirements of hardware targeted for IoT and edge computing systems. Convolutional neural networks (CoNNs) belong to one of the most popular types of DNN architectures. This article presents the design and evaluation of an accelerator for CoNNs. The system-level architecture is based on mixed-signal, cellular neural networks (CeNNs). Specifically, we present (i) the implementation of different layers, including convolution, ReLU, and pooling, in a CoNN using CeNN, (ii) modified CoNN structures with CeNN-friendly layers to reduce computational overheads typically associated with a CoNN, (iii) a mixed-signal CeNN architecture that performs CoNN computations in the analog and mixed signal domain, and (iv) design space exploration that identifies what CeNN-based algorithm and architectural features fare best compared to existing algorithms and architectures when evaluated over common datasets-MNIST and CIFAR-10. Notably, the proposed approach can lead to 8.7x improvements in energy-delay product (EDP) per digit classification for the MNIST dataset at iso-accuracy when compared with the state-of-the-art DNN engine, while our approach could offer 4.3x improvements in EDP when compared to other network implementations for the CIFAR-10 dataset.

[发布日期] 2019-06-01

[效力级别]  Proceedings Paper

[关键词] Hardware accelerator;convolutional neural networks;analog circuits;CNN;MACHINE;DESIGN;ENERGY