An Integrated Circuit Design of High Efficiency Parallel-SSHI Rectifier for Piezoelectric Energy Harvesting
[摘要] This paper presents the design and implementation of a rectifier for piezoelectric energy harvesting based on the parallel-synchronized-switch harvesting-on-inductor (P-SSHI) technique, also known as bias flip circuit[1]. The circuit is implemented with 0.25 μm CMOS high voltage process with only 0.9648 mm2chip area. Post-layout simulation of the circuit shows the circuit extracts 336% more power compared with the full-bridge rectifier. The system's average control power loss is 26 μW while operating with a self-made MEMS piezoelectric transducer with output current 25 μA 120Hz and internal capacitance 6.45nF. The output power is 43.42 μW under optimal load of 1.5 MΩ.
[发布日期] [发布机构] Department of Engineering Science and Ocean Engineering Science, National Taiwan University, Taipei, Taiwan^1;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan^2
[效力级别] 能源学 [学科分类]
[关键词] Design and implementations;Full bridge rectifier;High-efficiency;Internal capacitance;Output current;Parallel synchronized switch harvesting on inductors;Piezoelectric energy harvesting;Post layout simulation [时效性]
