Stochastic Communication: A New Paradigm for Fault-Tolerant Networks-on-Chip

[摘要] As CMOS technology scales down into the deep-submicron (DSM) domain, the costs of designand verification for Systems-on-Chip (SoCs) are rapidly increasing. Relaxing the requirement of100%correctnessfor devices and interconnects drastically reduces the costs of design but, at the same time, requiresSoCs to be designed with some degree of system-level fault-tolerance. Towards this end, this paper introduces anovel communication paradigm for SoCs, calledstochastic communication. This scheme separates communicationfrom computation by allowing the on-chip interconnect to be designed as a reusable IP and also provides abuilt-in tolerance to DSM failures, without a significant performance penalty. By using this communicationscheme, a large percentage of data upsets, packet losses due to buffers overflow, and severe levels of synchronizationfailures can be tolerated, while providing high levels of performance.

[学科分类] 电子、光学、磁材料