Eight-Bit Semiflash A/D Converter

[摘要] An 8-bit semiflash ADC is reported that uses a single array of 15 comparators for both the coarse and thefine conversion. Conversion is implemented in two steps. First, an estimate is made of the 4 most significant bits, which are then memorized in the output latch. Next, the remaining 4 bits are evaluated by the same array of comparators. The auto-zeroed comparators also perform the function of a sample-and-hold circuit. In the proposed 8-bit semiflash ADC, there are nosample-and-hold circuit, no DAC, no subtraction circuit, and no residue amplifier. As a result,a moderate conversion speed has been combined with a drastically reduced powerconsumption. The ADC was fabricated in a standard 0.6μm double-poly, double-metal CMOS process. Experimental results show monotonic conversion with very low integral and differential nonlinearities. These features, combined with the ultra-low power consumption, make the proposed circuit very suitable for low-power mixed-signal applications.

[学科分类] 电子、光学、磁材料