Enabling VLSI Processing Blocks forMIMO-OFDM Communications

[摘要] Multi-input multi-output (MIMO) systems combinedwith orthogonal frequency-division multiplexing (OFDM)gained a wide popularity in wireless applications due to thepotential of providing increased channel capacity and robustnessagainst multipath fading channels. However these advantagescome at the cost of a very high processing complexity andthe efficient implementation of MIMO-OFDM receivers is todaya major research topic. In this paper, efficient architecturesare proposed for the hardware implementation of the mainbuilding blocks of a MIMO-OFDM receiver. A sphere decoderarchitecture flexible to different modulation without any loss inBER performance is presented while the proposed matrix factorizationimplementation allows to achieve the highest throughputspecified in the IEEE 802.11n standard. Finally a novelE8spheredecoder approach is presented, which allows for the realization ofnew golden space time trellis coded modulation (GST-TCM)scheme. Implementation cost and offered throughput are providedfor the proposed architectures synthesized on a 0.13 μmCMOSstandard cell technology or on advanced FPGA devices.

[学科分类] 电子、光学、磁材料