A new BIST scheme for low-power and high-resolution DAC testing

[摘要] A BIST scheme for testing on chip DAC is presentedin this paper. We discuss the generation of on chiptesting stimuli and the measurement of digital signals with anarrow-band digital filter. We validate the scheme with softwaresimulation and point out the possibility of ADC BISTwith verified DACicus-journals.

[学科分类] 电子、光学、磁材料