已收录 268921 条政策
 政策提纲
  • 暂无提纲
ESD compact-simulation: investigation of inverter failure
[摘要] An ESD failure occurring inside the core circuitryknown as “inverter failure" will be presented and analysed inthis paper. The compact model utilised for this investigationis shortly presented. It will be shown that not only propertiesof the failed structure are relevant, but also surrounding circuitry.So the gate of an inverter will be connected during thesimulations in diverse ways to VDD and VSS. The differentpossibilities of influence of pre drivers can be appraised inthis way. In order to achieve a detailed understanding of theindividual failure, it is necessary to include ambient circuitryas well as parasitics like resistors and capacitances.
[发布日期]  [发布机构] 
[效力级别]  [学科分类] 电子、光学、磁材料
[关键词]  [时效性] 
   浏览次数:2      统一登录查看全文      激活码登录查看全文