Quantitative comparison of performance analysis techniques for modular and generic network-on-chip

[摘要] NoC-specific parameters feature a huge impact on performance andimplementation costs of NoC. Hence, performance and cost evaluation of theseparameter-dependent NoC is crucial in different design-stages but therequirements on performance analysis differ from stage to stage. In an earlydesign-stage an analysis technique featuring reduced complexity and limitedaccuracy can be applied, whereas in subsequent design-stages more accuratetechniques are required.

In this work several performance analysis techniques at different levels ofabstraction are presented and quantitatively compared. These techniquesinclude a static performance analysis using timing-models, a Colored PetriNet-based approach, VHDL- and SystemC-based simulators and an FPGA-basedemulator. Conducting NoC-experiments with NoC-sizes from 9 to 36 functionalunits and various traffic patterns, characteristics of these experimentsconcerning accuracy, complexity and effort are derived.

The performance analysis techniques discussed here are quantitativelyevaluated and finally assigned to the appropriate design-stages in anautomated NoC-design-flow.

[学科分类] 电子、光学、磁材料