Implementation of a digital trim scheme for SAR ADCs

[摘要] Successive approximation register (SAR) analog-to-digital Converters (ADC)are based on a capacitive digital-to-analog converter (CDAC)(McCreary and Gray, 1975). The capacitor mismatch in the capacitor array of theCDAC impacts the differential non-linearity (DNL) of the ADC directly. Inorder to achieve a transfer function without missing codes, trimming of thecapacitor array becomes necessary for SAR ADCs with a resolution of more than12 bit. This article introduces a novel digital approach for trimming. DNLmeasurements of an 18 bit SAR ADC show that digital trimming allows the sameperformance as analog trimming. Digital trimming however reduces the powerconsumption of the ADC, the die size and the required time for the productiontest.

[学科分类] 电子、光学、磁材料