From algorithm to implementation: a case study on blind carrier synchronization

[摘要] Increasing chip complexities demand a higher design productivity. IP cores, which implement commonly needed operations,can help to dramatically shorten development and verification times for new designs. They often allow for a efficientmapping of algorithmic tasks to a hardware architecture. In this paper we present a novel configurable building block forblind carrier synchronization that features combined frequency and phase offset estimation and an alternative modulationremoval that improvescommunication performance compared to state-of-the-art designs. The used design flow exploits the benefitsof IP cores for rapid development times while still offering the designer the full range of optimization possibilities for aspecific design. It allowed us to do an almost complete design space exploration, assuring a near-optimal solution to thegiven problem. The implementation platform is a XILINX Virtex II Pro FPGA.

[学科分类] 电子、光学、磁材料