Analog circuits using FinFETs: benefits in speed-accuracy-powertrade-off and simulation of parasitic effects

[摘要] Multi-gate FET, e.g. FinFET devices are the most promising contenders toreplace bulk FETs in sub-45 nm CMOS technologies due to their improved subthreshold and short channel behavior, associated with low leakage currents.The introduction of novel gate stack materials (e.g. metal gate, high-kdielectric) and modified device architectures (e.g. fully depleted, undopedfins) affect the analog device properties significantly. First measurementsindicate enhanced intrinsic gain (g_m/g_DS) and promising matchingbehavior of FinFETs. The resulting benefits regarding thespeed-accuracy-power trade-off in analog circuit design will be shown in thiswork. Additionally novel device specific effects will be discussed. Thehysteresis effect caused by charge trapping in high-k dielectrics orself-heating due to the high thermal resistor of the BOX isolation arepossible challenges for analog design in these emerging technologies. To gainan early assessment of the impact of such parasitic effects SPICE basedmodels are derived and applied in analog building blocks.

[学科分类] 电子、光学、磁材料