Gold free ohmic contacts for III-V MOSFET devices

[摘要] Over the past forty years the development of CMOS has been able to follow Moore’s law using planar silicon technology. However, this technology is reaching its limits as thedensity of transistors has a significant impact on the power dissipation in an integrated circuit. Alternative channel materials and device architectures will then be required in the future to reduce the power consumption of transistors. The development of CMOS technology with high mobility channel materials, specifically Ge for pMOS and III-V materials for nMOS, was the aim of the European Union FP7 funded Duallogic consortium, of which this project was part. The experimental work at the University of Glasgow was the III-V compound semiconductor MOSFET, in particular the study of Si processing compatible source/draincontacts to III-V MOSFET devices with InxGa1-xAs channel materials, which was an important aspect of this thesis. Another area investigated in this thesis is the impact ofcurrent crowding effects on source/drain contact resistance by aggressive scaling of devices.During this thesis, optimisation of a PdGe-based ohmic contact to buried channel device material with a In0.75GaAs channel led to a contact resistance of 0.15Ohm.mm compared to 1Ohm.mm in previous work by R. Hill. The PdGe-based contact also proved to be scalable in both vertical and lateral dimensions. This scaled structure was then integrated in a surface channel MOSFET device with 1μm access regions and gate lengths varying from 100nm to 20μm. The performance of the devices with 20μm gate lengths was then compared to devices with a NiGeAu based ohmic contact. An increase in RC, 1.82Ohm.mm vs. 0.94Ohm.mm, and Ron, 11.1Ohm.mm vs. 8.55Ohm.mm, was observed in the PdGe-based contact, which resulted in a decrease in gm, 92.3mS/mm vs. 103mS/mm, and Id,sat, 103mA/mm vs. 122mA/mm. However, further optimisation of the PdGe-based ohmic contact showed promising results with a contact resistance of 0.45Ohm.mm.The novel test structure is the first test structure, which makes direct contact to III-V material, with critical dimensions below the transfer length. This structure is able to experimentally observe the current crowding effects and allows for the extraction of the sheet resistance underneath the contact and a more accurate extraction of the specific contact resistivity. This offers a significant insight into the impact of the sheet resistance underneath the contact and the role it plays.

[发布机构] University:University of Glasgow;Department:School of Engineering

[关键词] III-V MOSFET, Ohmic Contact, nMOS, CMOS