Automatic Design of Efficient Application-centric Architectures.

[摘要] As the market for embedded devices continues to grow, the demand for highperformance, low cost, and low power computation grows as well. Many embeddedapplications perform computationally intensive tasks such as processing streamingvideo or audio, wireless communication, or speech recognition and must beimplemented within tight power budgets. Typically, generalpurpose processors are not able to meet these performance and power requirements.Custom hardware in the form of loop accelerators are often used to execute thecompute-intensive portions of these applications because they can achieve significantlyhigher levels of performance and power efficiency.Automated hardware synthesis from high level specifications is a key technologyused in designing these accelerators, because the resulting hardware is correct byconstruction, easing verification and greatly decreasing time-to-market in the quicklyevolving embedded domain. In this dissertation, a compiler-directed approach is usedto design a loop accelerator from a C specification and a throughput requirement. Thecompiler analyzes the loop and generates a virtual architecture containing sufficientresources to sustain the required throughput. Next, a software pipelining schedulermaps the operations in the loop to the virtual architecture. Finally, the acceleratordatapath is derived from the resulting schedule.In this dissertation, synthesis of different types of loop accelerators is investigated.First, the system for synthesizing single loop accelerators is detailed. In particular, ascheduler is presented that is aware of the effects of its decisions on the resulting hardware,and attempts to minimize hardware cost. Second, synthesis of multifunctionloop accelerators, or accelerators capable of executing multiple loops, is presented.Such accelerators exploit coarse-grained hardware sharing across loops in order to reduceoverall cost. Finally, synthesis of post-programmable accelerators is presented,allowing changes to be made to the software after an accelerator has been created.The tradeoffs between the flexibility, cost, and energy efficiency of these differenttypes of accelerators are investigated. Automatically synthesized loop acceleratorsare capable of achieving order-of-magnitude gains in performance, area efficiency,and power efficiency over processors, and programmable accelerators allow softwarechanges while maintaining highly efficient levels of computation.

[发布机构] University of Michigan

[效力级别] Computer Science

[关键词] Application-specific Hardware;Computer Science;Engineering;Computer Science & Engineering