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The development of a mass memory unit for a micro-satellite using NAND flash memory
[摘要] ENGLISH ABSTRACT:This thesis investigates the possible use of NAND flash memory for a mass memory uniton a micro-satellite. The investigation begins with an analysis of NAND flash memory devicesincluding the complexity of the internal circuitry and the occurrence of bad memorysections (bad blocks). Design specifications are produced and various design architecturesare discussed and evaluated. Subsequently, a four bus serial access architecture using 16-bit NAND flash devices was chosen to be developed further.A VHDL design was created in order to realise the intended system functionality. Themain functions of the design include a sustained write data rate of 24 MB/s, bad blockmanagement, multiple image storing, error checking and correction, defective device handlingand reading while writing. The design was simulated extensively using NAND flashsimulation models.Finally, a demonstration test board was designed and produced. This board includes anFPGA and an array of 16 8-bit NAND flash devices. The board was tested sucessfullyand a write data rate of 12 MB/s was achieved along with all the other main functions.
[发布日期]  [发布机构] Stellenbosch University
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