Low impedance characterisation and modeling of high power LDMOS devices

[摘要] In RF power transistor characterisation, the designer is confronted with low impedancemeasurements (typically from 1 Ohm to 12 Ohm). These transistors are contained inmetal-ceramic packages of which the lead widths vary with power capability. This thesispresents a high-quality fixture design with low impedance TRL calibration standards forcharacterisation of an LDMOS transistor. Pre-matching networks are used to transformto the low impedance environment. Since these pre-matching networks are independentof the termination impedance, the low impedance port can always be designed to complywith the same dimension as the device which is being measured.

[发布机构] Stellenbosch University