Radiation tolerant implementation of a soft-core processor for space applications

[摘要] The availability of high density FPGAs has made the use of soft-core processors an attractiveproposition for the low volume space market. Soft-core processors combinethe power of programmable logic with the ease of use of a conventional processor toprovide a highly customisable solution. However, the SRAM FPGAs used as implementationplatform are especially susceptable to radiation induced single event upsets,due to the sensitivity of their configuration memory. To safely use these processors ina space environment requires the modification of the processor to safely mitigate theseeffects.This thesis presents the process followed to develop and test a fault tolerant implementationof an 8-bit PicoBlaze soft-core processor on a Xilinx Spartan-3 SRAM FPGA.A thorough investigation was made into the available methods that can be used tomitigate single event upsets, in order to identify the most suitable ones. Guidelinesfor the application of SEU mitigation techniques to SRAM FPGAs were proposed. Asingle event upset simulator was designed and constructed to compare the differenttechniques. It mimics SEUs by injecting errors into the configuration memory of anFPGA.The results of error injection were used to develop a PicoBlaze implementation withlimited overhead, while it still offers a high degree of error mitigation.Three different designs were tested by proton irradiation to verify the protection affordedby the mitigation techniques. It was found that protected designs were morerobust. The cross-section of the FPGA was also determined, which can be used withthe SEU simulator to predict the dynamic cross-section of designs.The work contained in this thesis demonstrates the use of open-source intellectualproperty with commercial-off-the-shelf components to develop a robust component foruse in the miniature spacecraft market.

[发布机构] Stellenbosch University