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Settling time optimization technique for binary-weighted digital-to-analog converter
[摘要] References(4)Settling behavior of the binary-weighted switched-capacitor digital-to-analog converter output is analyzed and a design method for fast settling is presented. A calibration circuit that effectively reduces settling time beyond the process limit is also proposed and verified with various simulations.
[发布日期]  [发布机构] 
[效力级别]  [学科分类] 电子、光学、磁材料
[关键词] digital to analog converter;analog to digital converter;switched-capacitor circuit;settling time;successive approximation [时效性] 
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