Low complexity semi–systolic multiplication architecture over GF(2m)

[摘要] References(6)Cited-By(2)This paper presents a semi-systolic Montgomery multiplier based on the redundant basis representation of the finite field elements. The proposed multiplier has less hardware and time complexities compared to related multipliers. We also propose a serial systolic Montgomery multiplier that can be applied well in space-limited hardware. Furthermore, a simple inversion based on the proposed scheme is presented.

[学科分类] 电子、光学、磁材料

[关键词] modular multiplication;finite field arithmetic;systolic array