A low-power reference buffer with high PSRR and low crosstalk for time-interleaved ADCs
[摘要] References(4)Cited-By(1)A low power reference buffer is proposed to achieve high PSRR and less crosstalk between channels for time-interleaved analog-to-digital converters (ADCs). A conventional approach requires enough bandwidth in feedback amplifiers to suppress high frequency supply noise, which tends to increase power consumption. Furthermore the number of output drivers that share error amplifier output is unavoidably limited due to the coupling across ADC channels. We propose design techniques to improve the corner frequency of power supply rejection ratio (PSRR) by a factor of 100 and the cross-channel isolation by 20dB without drawing more current.
[发布日期] [发布机构]
[效力级别] [学科分类] 电子、光学、磁材料
[关键词] reference buffer;time interleaved ADC;analog to digital converter;pipelined ADC;1.5bit ADC;high PSRR [时效性]