High speed DC-DC dead time architecture

[摘要] References(10)Cited-By(1)A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.

[学科分类] 电子、光学、磁材料

[关键词] DC-DC converters;cascode;dead time auto-generation