A single ended 6T SRAM cell design for ultra-low-voltage applications

[摘要] References(9)Cited-By(7)In this paper, we present a novel six-transistor (6T) single-ended static random access memory (SE-SRAM) cell for ultra-low-voltage applications. The proposed design has a strong 2.65X worst case read static noise margin (SNM) compared to a standard 6T SRAM. A strong write-ability of logic ‘one' is achieved, which is problematic in an SE-SRAM cell with a 36% improvement compared to standard 6T SRAMs. A 16 × 16 × 32 bit SRAM with proposed and standard 6T bitcells is simulated and evaluated for read SNM, write-ability and power. The dynamic and leakage power dissipation in the proposed 6T SRAM are reduced by 28% and 21%, respectively, as compared to standard 6T SRAM.

[学科分类] 电子、光学、磁材料

[关键词] SRAM;SNM;leakage;process variation and subthreshold design