Improved gain 60 GHz CMOS antenna with N-well grid

[摘要] References(10)This paper presents a novel technique to enhance Antenna-on-Chip gain by introducing a high resistivity layer below it. Instead of using the costly ion implantation method to increase resistivity, the N-well that is available in the standard CMOS process is used. A distributed grid structure of N-well on P-type substrate is designed such that the P and N semiconductors types are fully depleted forming a layer with high resistivity. By an electromagnetic simulation, the using depletion layers enhance the antenna gain and radiation efficiency without increasing the occupied area. The simulated and measured |S11| are in fair agreement. The measured gain is �?1.5 dBi at 66 GHz.

[学科分类] 电子、光学、磁材料

[关键词] 60 GHz;Antenna-on-Chip;CMOS;PN-junction