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Variation-resilient pipelined timing tracking circuit for SRAM sense amplifier
[摘要] References(10)A resilient tracking circuit for suppressing the timing variation of SRAM sense amplifier enable (SAE) signal is proposed. Pipelined replica bitline technique is used to favour the desired design. Simulation results show that the cycle time is reduced by �?27% owing to �?70% reduction of the standard deviation of SAE at a 1.05 V supply voltage in 28 nm CMOS technology with four-stage pipeline.
[发布日期]  [发布机构] 
[效力级别]  [学科分类] 电子、光学、磁材料
[关键词] variation-resilient;timing tracking;pipelined replica bitline;sense amplifier enable;SRAM [时效性] 
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