N-variant Hardware Design

[摘要] The emergence of lightweight embedded devices imposes stringent constraints onthe area and power of the circuits used to construct them. Meanwhile, many ofthese embedded devices are used in applications that require diversity and flexibilityto make them secure and adaptable to the fluctuating workload or variable fabric.While field programmable gate arrays (FPGAs) provide high flexibility, the use ofapplication specific integrated circuits (ASICs) to implement such devices is moreappealing because ASICs can currently provide an order of magnitude less area andbetter performance in terms of power and speed. My proposed research introduces theN-variant hardware design methodology that adds the sufficient flexibility needed bysuch devices while preserving the performance and area advantages of using ASICs.The N-variant hardware design embeds different variants of the design controlpart on the same IC to provide diversity and flexibility. Because the control circuitryusually represents a small fraction of the whole circuit, using multiple versions of thecontrol circuitry is expected to have a low overhead. The objective of my thesis is toformulate a method that provides the following advantages: (i) ease of integration inthe current ASIC design flow, (ii) minimal impact on the performance and area of theASIC design, and (iii) providing a wide range of applications for hardware securityand tuning the performance of chips either statically (e.g., post-silicon optimization)or dynamically (at runtime). This is achieved by adding diversity at two orthogonallevels: (i) state space diversity, and (ii) scheduling diversity. State space diversityexpands the state space of the controller. Using state space diversity, we introducean authentication mechanism and the first active hardware metering schemes. On theother hand, scheduling diversity is achieved by embedding different control schedulesin the same design. The scheduling diversity can be spatial, temporal, or a hybridof both methods. Spatial diversity is achieved by implementing multiple controlschedules that use various parts of the chip at different rates. Temporal diversityprovides variants of the controller that can operate at unequal speeds. A hybrid ofboth spatial and temporal diversities can also be implemented. Scheduling diversityis used to add the flexibility to tune the performance of the chip. An applicationof the thermal management of the chip is demonstrated using scheduling diversity.Experimental results show that the proposed method is easy to integrate in the currentASIC flow, has a wide range of applications, and incurs low overhead.

[发布机构] Rice University

[效力级别] science